Download: buspirate.v0c.zip

A few weeks ago we wrote about our Bus Pirate universal serial interface tool. We used the recent holiday to add some new features, like a JTAG programmer, macros, frequency measurement, and more. A major code reorganization makes everything simpler to read and update.

Check out the a demonstration of the new features below. We’re compiling a roadmap and wish list, so share your ideas in the comments. You can also see how we used the Bus Pirate to read a smart card and test-drive an I2C crystal oscillator.

New protocols

I2C>m <–setup mode 1. HiZ <– high impedance pins (safe mode) 2. 1-WIRE <– not ready for this release 3. UART 4. I2C 5. SPI 6. JTAG <– interface and programmer 7. RAW2WIRE 8. RAW3WIRE MODE>1
900 mode SET
HiZ>

This firmware release lists three new protocols.

Hi-Z makes all pins high impedance/input, a safe state that won’t damage an attached circuit. To be safe, the Bus Pirate now starts in this mode.

1-Wire is listed, but we couldn’t include it in this release because we still don’t have any parts to test with our library. This is just a placeholder for now, but it will be added as soon as we get a 1-Wire part to test.

We wrote a simplified JTAG interface that includes a XSVF player for programming JTAG device chains.

**We included a hardware I2C library, but according to the device errata there’s a bug in the 24FJ64GA002 rev3 I2C module. This will work with a different chip (e.g. a 28pin dsPIC33).

Connection table

PIN

1-Wire

I2C*

SPI**

RS232

JTAG

B9

SDA

SDA

MOSI

–

TDI

B8

–

SCL

CLK

–

TCK

B7

–

–

MISO

RX

TDO

B6

–

–

CS

TX

TMS

B5

चौि

चौि

चौि

चौि

चौि

Ground

GND

GND

GND

GND

GND

*also raw 2 wire. **also raw 3 wire.

The new modes connect to the Bus Pirate as described in the table.

New features and settings

Frequency measurement

HiZ>F <– do a frequency count 9xx FREQ count ON AUX: 22199552Hz (22MHz) HiZ>

As seen in the DS1077 demonstration, we added a frequency counter to the Bus Pirate’s AUX pin.  ‘F’ steps frequency, maximum of about 50MHz.

Assign axillary control

HiZ>c <– menu c AUX PIN 1. AUX (DEFAULT) 2. CS/TMS MODE>1 <– set AUX control mode 9xx AUX: DEFAULT setting (AUX PIN) HiZ>

Sometimes we need to control the chip select (CS) /JTAG state device (TMS) pins manually. ‘c’ toggles the pin control between the axillary pin and the chip select pin.

Set terminal speed

HiZ>b <– menu b Set serial port speed: (bps) 1. 300 … 9. 115200 SPEED>9 <– set speed Adjust your terminal and press space to continue HiZ>

‘b’ adjusts the PC-side serial port speed.

Macros

A new syntax addition, ‘(#)’, triggers protocol dependent macros.

JTAG>(0) <–macro 0 0.Macro menu 1.Reset chain 2.Probe chain 3.XSVF player JTAG>

In any mode, use the macro (0) to display a menu of available macros.

I2C address search

I2C>(1) <–scan I2C addresses macro xxx searching 7bit I2C address space. Found devices at: 0xB0 0xB1 <–DS1077 responds to write and read address I2C>

The I2C library includes a macro to automatically search the I2C address range for devices. helpful when you work with an unknown chip.

Raw2wire smart card ISO 7813-3 ATR

RAW2WIRE>(1)<–ATR and decode macro ISO 7813-3 ATR 950 AUX LOW 951 AUX HIGH 4xx RAW2WIRE 0x01 CLOCK TICKS 950 AUX LOW ISO 7813-3 reply: 0xA2 0x13 0x10 0x91<–ATR bytes Protocol: 2 wire <–decoded ATR data Read type: to end<– Data units: 256 <– Data unit length: 8 bits <– RAW2WIRE>

Macro 1 resets and identifies a smart card. For much more about the ISO7813-3 ATR, see how we used the Bus Pirate to read a smart card.

JTAG

JTAG is a debugging and programming interface for all kinds of electronics. The raw hardware interface can be accessed with the Bus Pirate’s raw 3 wire library, but we added a few features to make it much easier.

JTAG has different modes where data entry does different things. Modes are navigated with the JTAG TMS signal; there are a bunch of JTAG modes, called states.The Bus Pirate’s JTAG library is just the raw 3 wire library, enhanced to help with JTAG state changes.

We only implemented the JTAG states we need to get data in and out of a JTAG device chain: reset, idle, data register, and instruction register. Macro (1) issues a JTAG chain reset, and initializes the chain to the idle state. { puts the JTAG chain in data register mode. [ puts the chain in instruction register mode. ] or } return the chain to the idle state. The Bus Pirate has an internal state device tracker that is smart enough to manage the chain without explicitly returning the chain to idle; in other words, you don’t have to close your tags. The state device tracker reports every state change to help debug problems.

JTAG>[0xfe {rrrr} <– same as [0xfe]{rrrr} xxx JTAGSM: already IDLE xxx JTAGSM: IDLE->Instruction Register (DELAYED ONE bit FOR TMS)
610 JTAG ready TO write IR <– JTAG chain instruction register 620 JTAG WRITE: 0xFE <– request ID xxx JTAGSM: (WROTE ढिलाइ गरिएको बिट) IR-> IDle <- -back INTLED XXX JTAGSM: INDLE-> डाटा रेजिस्टर <- डाटा दर्ता गर्न 111 jtag पढ्न / डा। 60 6300 Jtag पढ्नुहोस्: 0x93 <- -dvice आईडी 60 6300 Jtag पढ्नुहोस्: 0x40 60 6300 Jtag पढ्नुहोस्: 0x60 60 6300 Jtag पढ्नुहोस्: 0x59 XXX JTAGSM: DR-> IDLE <--बै--बै 60 6400 Jtag निष्क्रिय Jtag>

यहाँ एक Xilinx XC9572 chrd2 CPLD को साथ छोटो कुराकानी छ। हामी निर्देश दर्ता गर्न जान्छौं ([), र उपकरण आईडी अनुरोध आदेश (0xfe)। त्यसो भए हामी डाटा रेजिस्टर (}) चार बाइट्स (RRRR, वा R: 4 सर्भरहरू पढ्नुहोस्), र निष्क्रिय (} फर्कनुहोस् (})।

ढिलाइ के बिट लेख्न सकिन्छ?

जोगनले निर्देशन दर्तालाई लेखेको अन्तिम डाटा बिटलाई राज्य परिवर्तनको रूपमा एकै समयमा प्रविष्ट गर्नुपर्नेछ। किनभने बस समुद्री डाकुँट छैन जब हामी वास्तवमा राज्य परिवर्तन गर्दछ, यसले प्रत्येक बाइट को अन्तिम बिट रिपोर्ट गर्दछ जब सम्म तीन कुराहरु को एक नभएसम्म:

ए}, वा {कमाण्डको साथ निर्देशन दर्ता गर्नुहोस्

अर्को बाइट मान लेख्नुहोस्

एक पढ्ने आदेश

बिट्स बिट्सहरू बिट हीट अपरेशन्स (जस्तै! वा ^) द्वारा खाली गरिएको छैन। तपाईंको अन्तिम बाइट लेख्नु अघि यी गर्नुहोस्, वा कोड परिवर्तन गर्नुहोस्। हामीले पेन्डिंग डाटा रेजिष्टरलाई लेख्न सकेनौं, तर यो सायद आवश्यक छ। तपाईंले यसलाई कार्यान्वयन गर्न आवश्यक पर्दछ यदि तपाईं डाटा रजिस्टर लेख्दै हुनुहुन्छ भने मात्र पढ्नुभएझैं हामीले गरेका थियौं।

Jtag म्याक्रोहरू

Jtag> (1) <-Macro 1 XXX Jtagsm: रिसेट XXX JTAGSM: रिसेट-> निष्क्रिय
Jtag>

Jtag म्याक्रो (1) Jtag चेन रिसेट गर्दछ र त्यसपछि यो निष्क्रिय राज्यमा अगाडि बढ्छ।

Jtag> (2) निष्क्रिय
XXX Jtagsm: INDLE-> अनुभन दर्ता (TMS को लागि एक बिट)
XXX JTAGSM: IR-> निष्क्रिय
XXX JTAGSM: INDLE-> डाटा रेजिष्टर
XXX Jtagsm: DE-> निष्क्रिय
XXX Jtagsm: रिसेट
XXX JTAGSM: रिसेट-> निष्क्रिय
XXX JTAGSM: INDLE-> डाटा रेजिष्टर
XXX Jtag चेन रिपोर्ट: <रिपोर्टको रिपोर्ट 0x01 उपकरण (हरू) # 0x01: 0x93 0x40 0x60 0x60 0x59 <--davisy आईडीहरू XXX Jtagsm: DE-> निष्क्रिय
Jtag>

म्याक्रो (2) चेन रिसेट गर्दछ, उपकरणहरू गणना गर्दछ, र सबै उपकरण आईडीहरू रिपोर्ट गर्दछ।

Jtag> ())